//Stephen Kirksharian
//Robert Harkreader
//CPSC 321
//DUE 4/27/08

module _16_bit_shift(in,out);
	input [31:0]in;
	output [31:0]out;
	reg [31:0]out;

always @(in) begin
	out={in[15:0],16'd0};

end

endmodule
	
	